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LTC4232 Arkusz danych(PDF) 13 Page - Linear Technology |
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LTC4232 Arkusz danych(HTML) 13 Page - Linear Technology |
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13 / 16 page ![]() LTC4232 13 4232fb For more information www.linear.com/LTC4232 APPLICATIONS INFORMATION There are two VDD pins on opposite sides of the package that connect to the sense resistor and MOSFET. The PCB layout should be balanced and symmetrical to each VDD pin to balance current in the MOSFET bond wires. Figure 6 shows a recommended layout for the LTC4232. Although the MOSFET is self protected from overtem- perature, it is recommended to solder the backside of the package to a copper trace to provide a good heat sink. Note that the backside is connected to the SENSE pin and can- not be soldered to the ground plane. During normal loads the power dissipated in the MOSFET is as high as 1.9W. A 10mm × 10mm area of 1oz copper should be sufficient. This area of copper can be divided in many layers. It is also important to put C1, the bypass capacitor for the INTVCC pin as close as possible between the INTVCC and GND. 4232 F06 HEAT SINK VIA TO SINK GND C OUT VDD Figure 6. Recommended Layout Figure 7. 12V, 5A Backplane Resident Application with Insertion Activated Turn-On Additional Applications TheLTC4232hasawideoperatingrangefrom2.9Vto15V. The UV, OV and PG thresholds are set with few resistors. All other functions are independent of supply voltage. In addition to Hot Swap applications, the LTC4232 also functions as a backplane resident switch for removable load cards (see Figure 7.) Thelastpageshowsa3.3VapplicationwithaUVthreshold of 2.87V, an OV threshold of 3.77V and a PG threshold of 3.05V. R5 150k R6 20k C1 1µF RMON 20k 4232 F07 VDD PG OUT FB UV GND IMON ISET GATE LTC4232DHC OV INTVCC TIMER FLT VOUT 12V 5A 12V R7 10k R1 226k R2 20k 12V R4 20k R3 140k LOAD ADC Z1 Z1: DIODES INC. SMAJ22A |
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