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AN2156 Arkusz danych(PDF) 11 Page - STMicroelectronics |
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AN2156 Arkusz danych(HTML) 11 Page - STMicroelectronics |
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11 / 24 page ![]() AN2156 4 - Boot management 11/24 Figure 9. SystemMemory Boot mode development circuitry example 4.2 Test mode The TST pin must always be connected to GND to disable testmode. Testmode is ST’s reserved mode and must never be used by the application. Figure 10. TST pin connection SW0: 1-3 & SW1:1-3 User Boot Mode 1 SW0: 2-3 & SW1:1-3 User Boot Mode 2 SW0: 1-3 & SW1:2-3 SystemMemory Boot Mode SW0: 2-3 & SW1:2-3 Reserved VCC nRSTIN SW1 M1 2 1 3 2.2nF C1 R1 47k 10K R3 SW0 M0 2 1 3 VCC TST |
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