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AN4457 Arkusz danych(PDF) 7 Page - STMicroelectronics |
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AN4457 Arkusz danych(HTML) 7 Page - STMicroelectronics |
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7 / 24 page ![]() DocID026046 Rev 1 7/24 AN4457 UART emulator description 23 1.2 UART emulator block diagram Figure 1: UART emulator block diagram gives an overview of the interaction between the hardware peripherals and the software modules that make up the UART emulator: • Software modules They include the routines used for transmitting/receiving data and for formatting the data to be sent by DMA or stored into SRAM. Flags indicating the UART status are also available: – TC: Transmission Complete This flag is set by software when data transmission is complete. – RC: Reception Complete This flag is set by software when data reception is complete. – FE: Framing Error This flag allows frame error detection. – PE: Parity Error This flag is set by software when a parity error occurs in receive mode. • Hardware modules They consist of all the STM32F4 peripherals involved in UART emulation: – GPIO: I/O ports used as transmitter or receiver pins. – EXTI: in reception mode, the start bit falling edge is detected via an EXTI. – DMA: data transfers are performed by DMA. – TIM: it ensures that data are transmitted and received at the required speed. – SRAM: data are formatted and stored in the SRAM. Figure 1. UART emulator block diagram 1. The status flags and the error flags are shown in green and red, respectively. |
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