LT1186FC datasheet(14/16 Pages) LINER

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LT1186F

APPLICATIONS INFORMATION

lation due to its shunt capacitance. Use a decoupling

resistor of several kilohms between the ICCFL pin and the

IOUT pin if excessive trace stray capacitance exists. Nor-

mally, this resistor is not required.

In some applications, the maximum programming current

required at the ICCFL pin for a maximum lamp current will be

less than the full-scale output current of the DAC, which is

µA. The system designer can either limit the maximum

programming current through software built into the system,

or use a current splitter which shunts a percentage of the full-

scale current from the ICCFL pin. A splitter circuit is illustrated

in Figure 3. A divider string is used from a reference voltage

to set up a voltage level equal to the ICCFL summing voltage,

or 465mV. The main current flowing in the divider string

should be chosen to swamp out the effects of the shunted

current into the divider string.

The transfer function between lamp current and input

programming current must be empirically determined and

is dependent on the particular lamp/display housing com-

bination used. The lamp and display housing are a distrib-

uted loss structure due to parasitic lamp-to-frame capaci-

tance. This means that the current flowing at the high-

voltage side of the lamp is higher than what is flowing at

the DIO pin side of the lamp. The input programming

current is set to control lamp current at the high-voltage

side of the lamp, even though the feedback signal is the

lamp current at the bottom of the lamp. This ensures that

the lamp is not overdriven which can degrade the lamp’s

operating lifetime. Therefore, the full scale current of the

DAC does not necessarily correspond to the current re-

quired to set maximum lamp current.

Floating Lamp Configuration

In a floating lamp configuration, the lamp is fully floating

with no galvanic connection to ground. This allows the

transformer to provide symmetric differential drive to the

lamp. Balanced drive eliminates the field imbalance asso-

ciated with parasitic lamp-to-frame capacitance and re-

duces “thermometering” (uneven lamp intensity along the

lamp length) at low lamp currents.

Carefully evaluate display designs in relation to the physi-

cal layout of the lamp, its leads and the construction of the

display housing. Parasitic capacitance from any high

voltage point to DC or AC ground creates paths for

unwanted current flow. This parasitic current flow de-

grades electrical efficiency and losses up to 25% have

been observed in practice. As an example, at a Royer

operating frequency of 60kHz, 1pF of stray capacitance

represents an impedance of 2.65M

Ω. With an operating

lamp voltage of 400V and an operating lamp current of

6mA, the parasitic current is 150

µA. This additional cur-

rent must be supplied by the transformer secondary.

Layout techniques that increase parasitic capacitance

include long high voltage lamp leads, reflective metal foil

around the lamp and displays supplied in metal enclo-

sures. Losses for a good display are under 5%, whereas,

losses for a bad display range from 5% to 25%. Lossy

displays are the primary reason to use a floating lamp

configuration. Providing symmetric, differential drive to

the lamp reduces the total parasitic loss by one-half.

IOUT FULL-SCALE

µA

V(ICCFL)

465mV

VREF

I = 50

µA

0 < X < 1

SELECT V1 WITHIN THE DAC IOUT

COMPLIANCE RANGE

(EX. V1 = 2V FOR VCC = 3.3V OR 5V)

CHOOSE I1 >> (1 – X)I

R1 = (V1 – 0.465)/(X)(50

µA)

R2 = (V1 – 0.465)/(1 – X)(50

µA)

R3 = (VREF – 0.465)/I1

R4 = 0.465R3/[(1 – X) 50

µAR3

+ (VREF – 0.465)]

LT1186F • F03

V(ICCFL)

(1 – X)I

Figure 3

Grounded Lamp Configuration

In a grounded lamp configuration, the low voltage side of

the lamp connects directly to the LT1186F DIO pin. This

pin is the common connection between the cathode and

anode of two internal diodes. In previous grounded lamp

solutions, these diodes were discrete units and are now

integrated onto the IC, saving cost and board space.

Bidirectional lamp current flows in the DIO pin and thus,

the diodes conduct alternately on half cycles. Lamp cur-

rent is controlled by monitoring one-half of the average

lamp current. The diode conducting on negative half

cycles has one-tenth of its current diverted to the CCFL pin

and nulls against the source current provided by the lamp

current programmer circuit. The compensation capacitor

on the CCFL VC pin provides stable loop compensation and

an averaging function to the rectified sinusoidal lamp

current. Therefore, input programming current relates to

one-half of average lamp current.

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