LT1186FCS datasheet(7/16 Pages) LINER

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LT1186F

TYPICAL PERFORMANCE CHARACTERISTICS

TEMPERATURE (

°C)

–50

–25

100

LT1186F • G25

VCC = 5V

VCC = 3.3V

VOUT = 0V

SUPPLY VOLTAGE (V)

LT1186F • G26

VOUT = 0V

TJ = 25°C

OUTPUT BIAS VOLTAGE (V)

–20

–10

–15

–5

LT1186F • G27

TJ = 25°C

VCC = 5V

VCC = 3.3V

PIN FUNCTIONS

CCFL PGND (Pin 1): This pin is the emitter of an internal

NPN power switch. CCFL switch current flows through

this pin and permits internal, switch-current sensing. The

regulator provides a separate analog ground and power

ground to isolate high current ground paths from low

current signal paths. Linear Technology recommends the

use of star-ground layout techniques.

ICCFL (Pin 2): This pin is the input to the CCFL lamp current

programming circuit. This pin internally regulates to

465mV. The pin accepts a DC input current signal of 0

µA

to 50

µA full scale from the DAC. This input signal is

converted to a 0

µA to 250µA source current at the CCFL VC

pin. As input programming current increases, the regu-

lated lamp current increases. For a typical 6mA lamp, the

range of input programming current is about 0

µA to 50µA.

DIO (Pin 3): This pin is the common connection between

the cathode and anode of two internal diodes. The remain-

ing terminals of the two diodes connect to ground. In a

grounded-lamp configuration, DIO connects to the low

voltage side of the lamp. Bidirectional lamp current flows

in the DIO pin and thus the diodes conduct alternately on

half cycles. Lamp current is controlled by monitoring one-

half of the average lamp current. The diode conducting on

negative half cycles has one-tenth of its current diverted to

the CCFL VC pin. This current nulls against the source

current provided by the lamp-current programmer circuit.

A single capacitor on the CCFL VC pin provides both stable

loop compensation and an averaging function to the half-

wave-rectified sinusoidal lamp current. Therefore, input

programming current relates to one-half of average lamp

current. This scheme reduces the number of loop com-

pensation components and permits faster loop transient

response in comparison to previously published circuits.

If a floating lamp configuration is used, ground the DIO

pin.

CCFL VC (Pin 4): This pin is the output of the lamp current

programmer circuit and the input of the current compara-

tor for the CCFL regulator. Its uses include frequency

compensation, lamp-current averaging for grounded-lamp

circuits and current limiting. The voltage on the CCFL VC

pin determines the current trip level for switch turn-off.

During normal operation this pin sits at a voltage between

0.95V (zero switch current) and 2.0V (maximum switch

current) with respect to analog ground (AGND). This pin

has a high impedance output and permits external voltage

clamping to adjust current limit. A single capacitor to

ground provides stable loop compensation. This simpli-

fied loop compensation method permits the CCFL regula-

tor to exhibit single-pole transient response behavior and

virtually eliminates transformer output overshoot.

DAC IOUT vs IOUT Bias Voltage

DAC IOUT vs Supply Voltage

DAC IOUT vs Temperature

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