LTC1553LCSW datasheet(12/20 Pages) LINER

12 / 20 page

LTC1553L

Table 4. Recommended Minimum RIMAX Resistor (kΩ) vs Maximum Operating Load Current and External MOSFET Q1

MAXIMUM OPERATING

SUD50N03-10

MTD20N03HDL

LOAD CURRENT (A)

SUD50N03-10

(TWO IN PARALLEL)

MTD20N03HDL

(TWO IN PARALLEL)

2.4

1.2

4.3

2.2

2.7

1.3

5.1

2.7

3.0

1.5

6.2

3.0

3.6

1.8

6.8

3.3

3.9

2.0

7.5

3.6

APPLICATIONS INFORMATION

OUTEN and Thermistor Input

The LTC1553L includes a low power shutdown mode,

controlled by the logic at the OUTEN pin. A high at OUTEN

allows the part to operate normally. A low level at OUTEN

stops all internal switching, pulls COMP and SS to ground

internally and turns Q1 and Q2 off. OT and PWRGD are

pulled low, and FAULT is left floating. In shutdown, the

LTC1553L quiescent current will drop to about 130

µA.

The remaining current is used to keep the thermistor

sensing circuit at OUTEN alive. Note that the leakage

current of the external MOSFETs may add to the total

shutdown current consumed by the circuit, especially at

elevated temperature.

OUTEN is designed with multiple thresholds to allow it to

also be utilized for over-temperature protection. The power

MOSFET operating temperature can be monitored with an

external negative temperature coefficient (NTC) thermistor

mounted next to the external MOSFET which is expected

to run the hottest –– often the high-side device, Q1. Elec-

trically, the thermistor should form a voltage divider with

another resistor, R1, connected to VCC. Their midpoint

should be connected to OUTEN (see Figure 6). As the

temperature increases, the OUTEN pin voltage is reduced.

Under normal operating conditions, the OUTEN pin should

stay above 2V. All circuits will function normally, and the

OT pin will remain in a high state. If the temperature gets

abnormally high, the OUTEN pin voltage will eventually

drop below 2V. OT will switch to a logic low, providing an

over-temperature warning to the system. As OUTEN drops

below 1.7V, the LTC1553L disables both FET drivers. If

OUTEN is less than 1.2V, the LTC1553L will enter shut-

down mode. To activate any of these three modes, the

OUTEN voltage must drop below the respective threshold

for longer than 30

µs.

Clock Synchronization

The internal oscillator can be synchronized to an external

clock by applying the external clocking signal to the

OUTEN pin. The synchronizing range extends from the

initial operating frequency up to 500kHz. If the external

frequency is much higher than the natural free-running

frequency, the peak-to-peak sawtooth amplitude within

the LTC1553L will decrease. Since the loop gain is in-

versely proportional to the amplitude of the sawtooth, the

compensation network may need to be adjusted slightly.

Note that the temperature sensing circuitry does not

operate when external synchronization is used.

MOSFET Gate Drive

Power for the internal MOSFET drivers is supplied by

PVCC. This supply must be above the input supply voltage

by at least one power MOSFET VGS(ON) for efficient

operation. This higher voltage can be supplied with a

separate supply, or it can be generated using a simple

charge pump as shown in Figure 7. The 85% typical

maximum duty cycle ensures sufficient off-time to refresh

the charge pump during each cycle.

VOUT

1553L F06

COUT

5.6k

VIN

VCC

NTC THERMISTOR

MOUNT IN CLOSE

THERMAL PROXIMITY

TO Q1

LTC1553L

PENTIUM II

SYSTEM

OUTEN

Figure 6. OUTEN Pin as a Thermistor Input

LTC1553LCSW Arkusz danych(PDF) 12 Page - Linear Technology

LTC1553LCSW Arkusz danych(HTML) 12 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Arkusz danych Pobierz

Link URL