PYA28C64B - 8K x 8 EEPROM

Page 6

Document # EEPROM111 REV 02

TIMIng WAVEFORM OF PAgE WRITE CYCLE

nOTES:

• For each successive write within the page write operation, A

known address could occur.

• Between successive byte writes within a page write operation, OE can be strobed LOW. For example, this can be

done with CE and WE HIGH to fetch data from another memory device within the system for the next write. Alterna-

tively, this can be done with WE HIGH and CE LOW, effectively performing a polling operation.

• the timings shown above are unique to page write operations. Individual byte load operations within the page write

must conform to either the CE or WE controlled write cycle timing.