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UPSL102G-AF5-R Arkusz danych(PDF) 2 Page - Unisonic Technologies |
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UPSL102G-AF5-R Arkusz danych(HTML) 2 Page - Unisonic Technologies |
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2 / 6 page ![]() UPSL102 Preliminary LINEAR INTEGRATED CIRCUIT UNISONICTECHNOLOGIESCO.,LTD 2 of 6 www.unisonic.com.tw QW-R125-028.c MARKING 54 3 L102G 2 1 PIN CONFIGURATION 3 2 1 4 5 BASE CS GND VDD INV PIN DESCRIPTION PIN NO. PIN NAME DESCRIPTION 1 GND Ground 2 CS Current sense input. 3 BASE Base driver with current limit for power BJT. 4 INV The voltage feedback from auxiliary winding. 5 VDD Power supply. BLOCK DIAGRAM VDD INV GND CC Controller UVLO Logic Control Base Drive LEB BASE CS OCP 3 2 1 4 5 POR OVP 5V Internal Supply OSC OTP |
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