BL6528 datasheet(4/27 Pages) BELLING

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BL6528

Single-phase Multifunction Metering IC

4 / 27

V1.0

nRST

Reset Pin. Logic low on this pin will hold the ADCS and digital circuitry

in a reset condition and clear internal registers.

DVDD

Digital Power Supply（+5V）,provides the supply voltage for the digital

circuitry. It should be maintained at 5 V±5% for specified operation

AVDD

Power Supply (+5V). Provides the supply voltage for the circuitry. It

should be maintained at 5 V±5% for specified operation.

4,5

V1P,V1N

Analog input for current channel, These inputs are fully differential

voltage inputs with a maximum signal level of ±660 mV, Adjustable

Gain.

6,7

V2N,V2P

Negative and Positive Inputs for Voltage Channel. These inputs provide a

fully differential input pair. The maximum differential input voltage is ±

660 mV for specified operation. Adjustable Gain.

AGND

Ground Reference. Provides the ground reference for the circuitry.

VREF

On-Chip Voltage Reference. The on-chip reference has a nominal value of

2.5V ± 8% and a typical temperature coefficient of 30ppm/℃. An

external reference source may also be connected at this pin. This pin

should be decoupled to AGND with a 1uF ceramic capacitor.

DGND

Digital Ground.

CF_WATT

Calibration Frequency. The CF logic output gives instantaneous active

power information. This output is intended to use for calibration purposes.

The full-scale output frequency can be scaled by the value of CFDIV

the power is high and the output period less than 180ms, the pulse width

equals to half of the output period

Voltage waveform Zero –cross output

nSAG

This logic output goes active low when either no zero- cross are detected

or a low voltage threshold is crossed for a specified duration

nIRQ

Interrupt request output.

CLKIN

Clock In. An external clock can be provided at this logic input,

Alternatively, a crystal (3.58MHz) can be connected across this pin and

pin17 to provide a clock source. Ceramic load capacitors of between 22pF

and 33pF should be used with the gate oscillator circuit.

CLKOUT

A crystal can be connected access this pin and PIN16 to provide a clock

source for BL6528.

nCS

Chip select for SPI interface. This pin must be pulled low if using the SPI

interface.

SCLK

Serial clock input for the synchronous serial interface. All serial

communication data are synchronized to the clock.

DOUT

Data output for SPI interface. Data is shifted out at this pin on the rising

edge of SCLK. This output is normally in a high impedance state, unless

it is driving data out to the serial data bus.

DIN/URXD

Data input for SPI interface. Data is shifted in at this pin on the rising

edge of SCLK.

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