LDO1

LDO2

EN1

EN2

GND

LP5996

SNVS415C – NOVEMBER 2006 – REVISED MAY 2013

www.ti.com

Functional Block Diagram

Pin Descriptions

Name

Pin No

Function

1

Voltage Supply Input. Connect a 1µF capacitor between this pin and GND.

EN1

2

Enable Input to Regulator 1. Active high input.

High = On. Low = OFF.

EN2

3

Enable Input to Regulator 2. Active high input.

High = On. Low = OFF.

4

Internal Voltage Reference Bypass. Connect a 10nF capacitor from this pin to GND to reduce noise

and improve line transient and PSRR.

This pin may be left open.

N/C

5

No Connection. Do not connect to any other pin.

GND

6

Common Ground pin. Connect externally to exposed pad.

N/C

7

No Connection. Do not connect to any other pin.

N/C

8

No Connection. Do not connect to any other pin.

9

Output of Regulator 2. 300mA maximum current output. Connect a 1µF capacitor between this pin to

GND.

10

Output of Regulator 1. 150mA maximum current output. Connect a 1µF capacitor between this pin to

GND.

GND

Pad

Common Ground. Connect to Pin 6.

2

Submit Documentation Feedback

Copyright © 2006–2013, Texas Instruments Incorporated

Product Folder Links: LP5996