A25LS512A datasheet(18/43 Pages) AMICC

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A25LS512A Series

(November, 2014, Version 1.1)

AMIC Technology Corp.

Fast Read Dual Input-Output (BBh)

The Fast Read Dual Input-Output (BBh) instruction is similar

to the Fast_Read (0Bh) instruction except the data is input

and output on two pins, DO and DIO, instead of just DO. This

allows data to be transferred from the A25LS512A at twice

the rate of standard SPI devices.

Similar to the Fast Read instruction, the Fast Read Dual

Output instruction can operate at the highest possible

frequency

fC (See AC Characteristics). This is

accomplished by adding four “dummy” clocks after the 24-bit

address as shown in figure 11. The dummy clocks allow the

device’s internal circuits additional time for setting up the

initial address. The input data during the dummy clocks is

“don’t care”. However, the DIO and DO pins should be

high-impedance prior to the falling edge of the first data out

clock.

Figure 11. FAST_READ_DUAL_INPUT-OUTPUT Instruction Sequence and Data-Out Sequence

Instruction

High Impedance

MSB

810

01 2 3 4 5 6 7

24-Bit Address

16 17 18 19

22 20 18

6 42 0

DIO

20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35

Dummy

Byte

MSB

7 5 31 75 3

MSB

7 5 31 75 3 1

6 4 2 0 6 4 2 0 6 4 2 0 6 4 2 0

Data Out 2

Data Out 3

Data Out 4

Data Out 5

DIO switches from input to output

21 19

5 3 1

6 4 2 0

3 2 1 0

7 531

MSB

Data Out 1

Note: Address bits A23 to A16 are Don’t Care, for A25LS512A.

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