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AS3695C Arkusz danych(PDF) 5 Page - ams AG |
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AS3695C Arkusz danych(HTML) 5 Page - ams AG |
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5 / 40 page ![]() AS3695C austriamicrosystems www.austriamicrosystems.com Rev 1.11 / 2010-12-08 4 - 39 Symbol Parameter Conditions Min Typ Max Unit Tj Junction Temperature -20 115 °C 3.2.2 Power supply Symbol Parameter Conditions Min Typ Max Unit VDD Supply Voltage 4.0 5.5 V VDD_POR Power on reset level Circuit stays in power down until VDD_POR is reached. G1-G16 are pulled down with 130k 2.4 2.9 V IDD_q Quiescent current VDD= 5V, Default setting, PWM = 0 20 mA IDD_r Supply current VDD = 5V, HSYNC = 1MHz, Duty = 50% 30 mA V2_5 Voltage regulator output 2.5 V 3.2.3 Current outputs Symbol Parameter Conditions Min Typ Max Unit VDX Output voltage pins Dx 30 V RDX Input resistance in Dx PWM = 0 PWM = 1 10 0.1 M M VGX Max output voltage pin Gx Igx = 1mA VDD- 0.6 V IGX Max output current pin Gx 2 3 mA IResx Input current pin RESx URESx = 0.5V URESx = 0.8V 10 100 uA Iled_250 Trimmed Current accuracy Trimmed during production ILED =100mA, Temp = 25°C, DACref=800mV, VDAC = 250mV (1) external NMOS-Transistor used, (excluding error of external Rset) -0.5 +0.5 % Iled_all FET Current accuracy External FET Temp = 25°C, DACref=800mV, VDAC = 200mV to 800mV (2) external NMOS-Transistor used, (excluding error of external Rset) -1.4 +1.4 % Ich_250 Channel to channel Current accuracy ILED =100mA, Temp = 25°C, DACref=800mV, VDAC = 250mV (1) external NMOS-Transistor used, (excluding error of external Rset) 0.2 % Iled_all_T FET Current accuracy External FET Tjunction = -20°C to +100°C, DACref=800mV, VDAC = 200mV to 800mV (2) external NMOS-Transistor used, (excluding error of external Rset) -1.5 +1.5 % Iled_all_T BJT Current accuracy External BJT (B=100) Tjunction = -20°C to +100°C DACref=800mV, VDAC = 200mV to 800mV (2) external BJT-Transistor (B=100 ) used, (excluding error of external Rset) -1.5 +1.5 % Note: (1) It is recommended to use DACref = 800mV in order to achieve specified accuracy (2) It is not recommended to use VDAC < 200mV in order to minimize influences from PCB- layout and noise. |
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