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LAN8820I Arkusz danych(PDF) 8 Page - Microchip Technology

Numer części LAN8820I
Szczegółowy opis  RGMII 10/100/1000 Ethernet Transceiver
PDF  83 Pages
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Producent  MICROCHIP [Microchip Technology]
Strona internetowa  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN8820I Arkusz danych(HTML) 8 Page - Microchip Technology

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LAN8820/LAN8820I
DS00001871B-page 8
 2009-2015 Microchip Technology Inc.
Note 2-2
Configuration strap values are latched on hardware reset. Configuration straps are identified by an
underlined symbol name. Signals that function as configuration straps must be augmented with an
external resistor when connected to a load. Refer to Section 3.8, "Configuration," on page 23 for
additional information.
1
Configuration
Input 2
CONFIG2
IS
(PD)
This pin sets the MOD[1:0] bits of the Extended
Mode Control/Status Register on reset or power-
up. It must be connected to VSS, 100_LED,
1000_LED, or VDD25IO. Refer to Section 3.8.1.2,
"CONFIG[3:0] Configuration Pins," on page 24 for
additional information.
1
Configuration
Input 3
CONFIG3
IS
(PD)
This pin sets the MOD[3] bit of the Extended Mode
Control/Status Register on reset or power-up. It
must be connected to 1000_LED. Refer to Section
3.8.1.2, "CONFIG[3:0] Configuration Pins," on
page 24 for additional information.
TABLE 2-4:
ETHERNET PINS
Num Pins
Name
Symbol
Buffer
Type
Description
1
Ethernet TX/
RX Positive
Channel 0
TR0P
AIO
Transmit/Receive Positive Channel 0.
1
Ethernet TX/
RX Negative
Channel 0
TR0N
AIO
Transmit/Receive Negative Channel 0.
1
Ethernet TX/
RX Positive
Channel 1
TR1P
AIO
Transmit/Receive Positive Channel 1.
1
Ethernet TX/
RX Negative
Channel 1
TR1N
AIO
Transmit/Receive Negative Channel 1.
1
Ethernet TX/
RX Positive
Channel 2
TR2P
AIO
Transmit/Receive Positive Channel 2.
1
Ethernet TX/
RX Negative
Channel 2
TR2N
AIO
Transmit/Receive Negative Channel 2.
1
Ethernet TX/
RX Positive
Channel 3
TR3P
AIO
Transmit/Receive Positive Channel 3.
1
Ethernet TX/
RX Negative
Channel 3
TR3N
AIO
Transmit/Receive Negative Channel 3.
1
External PHY
Bias Resistor
ETHRBIAS
AI
Used for the internal bias circuits. Connect to an
external 8.06K 1.0% resistor to ground.
TABLE 2-3:
LED & CONFIGURATION PINS (CONTINUED)
Num
Pins
Name
Symbols
Buffer
Type
Description



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