A6986F datasheet(20/72 Pages) STMICROELECTRONICS

20 / 72 page

Functional description

A6986F

20/72

DocID027739 Rev 1

RUP and RDWN are selected to guarantee:

Equation 9

The time to ramp the internal voltage reference can be calculated from Equation 10:

Equation 10

that is the equivalent soft-start time to ramp the output voltage.

Figure 8 shows the soft-start phase with the following component selection: RUP = 180 k,

RDWN = 33 k, CSS = 200 nF, the 1N4148 is a small signal diode and VSTEP = 13 V.

Figure 8. External soft-start network VSTEP driven

The circuit in Figure 7 introduces a time delay between VSTEP and the switching activity that

can be calculated as:

Equation 11

Figure 9 shows how the device discharges the soft-start capacitor after an UVLO or thermal

shutdown event in order to restart the switching activity ramping the error amplifier reference

voltage.

VSS_FINAL 2 V VSS_END





TSS

CSS RSS_EQ

VSS_FINAL VSS START

–

VSS_FINAL VSS END

–

-----------------------------------------------------------







TSS DELAY

CSS RSS_EQ

VSS_FINAL

VSS_FINAL VSS START

–

-----------------------------------------------------------







A6986F Arkusz danych(PDF) 20 Page - STMicroelectronics