R6986 datasheet(43/62 Pages) STMICROELECTRONICS

43 / 62 page

DocID026996 Rev 2

43/62

R6986

Application notes

Please refer to Table 7: LNM / LCM selection on page 12 to identify the pull-up / pull-down

resistor value. (LNM, RST threshold 93%) / (LCM, RST threshold 93%) preferred

codifications don't require any external resistor.

7.4

Voltage supervisor

The embedded voltage supervisor (composed of the RST and the DELAY pins) monitors the

regulated output voltage and keeps the RST open collector output in low impedance as long

as the VOUT is out of regulation. In order to ensure a proper reset of digital devices with

a valid power supply, the device can delay the RST assertion with a programmable time.

Figure 30. Voltage supervisor operation

The comparator monitoring the FB voltage has four different programmable thresholds

(80%, 87%, 93%, 96% nominal output voltage) for high flexibility (see Section 7.3: MLF pin

and Table 7: LNM / LCM selection on page 12).

When the RST comparator detects the output voltage is in regulation, a 2

A internal current

source starts to charge an external capacitor to implement a voltage ramp on the DELAY

pin. The RST open collector is then released as soon as VDELAY = 1.234 V (see Figure 30).

The CDELAY is dimensioned accordingly with Equation 42:

Equation 42

The maximum suggested capacitor value is 270 nF.

CDELAY

ISSCH TDELAY



VDELAY

------------------------------------------

AT

DELAY



1.234V

-------------------------------------

R6986 Arkusz danych(PDF) 43 Page - STMicroelectronics