A

A

S

0

1

1

1

A1

A2

A0

0

Start

Condition

ACK

From Slave

ACK

From Slave

Data

Data

Slave Address

R/W

P7

P6

1

P0

P7

P0

A

Integral Multiples of Two Bytes

P5

SCL

SDA

Write to

Port

Data Output

Voltage

P5 Output

Voltage

P5 Pullup

Output

Current

INT

ACK

From Slave

Data A0

and B0

Valid

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

PCF8574A

www.ti.com

SCPS069F – JULY 2001 – REVISED NOVEMBER 2015

8.3.3 Address Reference

INPUTS

BIT WRITE

READ ADDRESS

A2

A1

A0

ADDRESS

L

L

L

113 (dec), 71 (hex)

112 (dec), 70 (hex)

L

L

H

115 (dec), 73 (hex)

114 (dec), 72 (hex)

L

H

L

117 (dec), 75 (hex)

116 (dec), 74 (hex)

L

H

H

119 (dec), 77 (hex)

118 (dec), 76 (hex)

H

L

L

121 (dec), 79 (hex)

120 (dec), 78 (hex)

H

L

H

123 (dec), 7B (hex)

122 (dec), 7A (hex)

H

H

L

125 (dec), 7D (hex)

124 (dec), 7C (hex)

H

H

H

127 (dec), 7F (hex)

126 (dec), 7E (hex)

8.4 Device Functional Modes

Figure 16 and Figure 17 show the address and timing diagrams for the write and read modes, respectively.

Figure 16. Write Mode (Output)

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