STAP16DPPS05 datasheet(10/33 Pages) STMICROELECTRONICS

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Electrical characteristics

STAP16DPPS05

10/33

DocID024306 Rev 6

VDD = 5 V, Tj = 25 °C, unless otherwise specified.

Table 8. Switching characteristics(1)(2)

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

fclk

Clock frequency

Cascade operation

MHz

tPLH1

CLK-OUTn, LE/DM1 = H,

OE/DM2 = L

VIH = VDD

VIL = GND CL = 10 pF

IO = 20 mA VL = 3.0 V

RL = 60 Ω

VDD = 3.3 V

VDD = 5 V

tPLH2

LE/DM1-OUTn,

OE/DM2 = L

VDD = 3.3 V

VDD = 5 V

tPLH3

OE/DM2-OUTn, LE\DM1 =

VDD = 3.3 V

120

VDD = 5 V

tPLH

CLK-SDO

VDD = 3.3 V

VDD = 5 V

tPHL1

CLK-OUTn,

LE/DM1 = H,

OE/DM2 = L

VDD = 3.3 V

VDD = 5 V

tPHL2

LE/DM1-OUTn,

OE/DM2 = L

VDD = 3.3 V

VDD = 5 V

tPHL3

OE/DM2-OUTn,

LE/DM1 = H

VDD = 3.3 V

VDD = 5 V

tPHL

CLK-SDO

VDD = 3.3 V

VDD = 5 V

tON

Output rise time

10~90% of voltage

waveform

VDD = 3.3 V

VDD = 5 V

tOFF

Output fall time

90~10% of voltage

waveform

VDD = 3.3 V

VDD = 5 V

CLK rise time (3)

µs

CLK fall time (3)

All table limits are guaranteed by design.

Not tested in production.

If devices are connected in cascade and tr or tf is large, it may be critical to achieve the timing required for data transfer

between two cascaded devices.

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