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VNH7100AS Arkusz danych(PDF) 23 Page - STMicroelectronics |
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VNH7100AS Arkusz danych(HTML) 23 Page - STMicroelectronics |
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23 / 38 page ![]() DocID028092 Rev 4 23/38 VNH7100AS Application information 37 Figure 17. Suggested PCB layout Note: PCB layout recommendation: Optimized connection (short) between Drain LSD and Source HSD Optimized GNDa and GNDb connection (symmetric connection) 3.1 Reverse battery protection Three possible solutions can be considered: • A Schottky diode D connected to VCC pin • An N-channel MOSFET connected to the GND pin • A P-channel MOSFET connected to the VCC pin In case the reverse battery protection is not present, the device sustains no more than -15 A because of the two Body diodes of the Power MOSFETs. Additionally, in reverse battery condition the I/Os of the device is pulled down to the VCC line (approximately -1.5 V). Series resistor must be inserted to limit the current sunk from the microcontroller I/Os. If IRmax is the maximum target reverse current through microcontroller I/Os, series resistor is: 3.2 OFF-state open-load detection – External circuitry dimensioning The detection of an open-load in off state requires an external circuitry to be connected between Output and VBATT. For the detection it is necessary to put one network on each leg in case of Half Bridge operation or one network on one of the output in case of full bridge (see Table 13: Off-state - truth table). The external circuitry is made up by an external pull-up resistor Rpull_up connecting the output to a positive supply voltage VPU (VBatt). R V IO s V CC – I Rmax ------------------------------ = |
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