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VX6953CB Arkusz danych(PDF) 17 Page - STMicroelectronics |
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VX6953CB Arkusz danych(HTML) 17 Page - STMicroelectronics |
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17 / 107 page ![]() 8209023 Rev 5 17/107 VX6953CB Functional description 3 Functional description This chapter details the main blocks in the device: • analog video block, see Section 3.1 • digital video block, see Section 3.2 • power management, see Section 3.4 on page 19 This chapter also describes: • the device’s operating modes, Section 3.3 on page 18 • clock and frame rate control, see Section 3.5 on page 26 • control and video interface formats, see Section 3.6 on page 27 3.1 Analog video block 3.1.1 Block diagram The analog video block, shown in Figure 4, consists of a 5.0 Mpixel resolution pixel array, power management circuitry. The digital block provides all timing signals to drive the analog block. Figure 4. Overview of analog video block Pixel voltage values are read out and digitized using the address decoders and column ADC. 5.0 Mpixel pixel array Y address Digital logic raw sensor data Timing signals Timing signals Power management SRAM readout X-Address Column ADC |
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