SP506CF datasheet(22/30 Pages) SIPEX

22 / 30 page

SP505/6/7APN/03

SP505, SP506, SP507 Application Note

Figure 37. SP507 Retrofit Board

has a logic LOW enable. The receivers use a logic

LOW enable for its receiver enable lines except for

the TM receiver, which has a logic HIGH enable.

The DIP switches for the SP507EB evaluation board

is such that the "down" position of the switch will

be considered "ON" and the "up" position will be

considered "OFF", regardless up enable polarity.

Note that the SP507EB Rev. A boards will have the

label on the switches reversed. But the true state is all

transceivers enabled when rocker switches are

positioned down.

On the right side of the board with the driver inputs,

there is a common bus named INPUT, which has

access points next to each driver input. This bus is

added on the board for convenience so that the driver

inputs can all be connected together via jumper wires

to this bus. The INPUT trace can be followed on the

top layer of the board.

The other DIP switch will configure the physical

layer protocol desired on the transceiver IC.

The SP507 uses three bits M0, M1, and M2.

The decoder bits will be logic HIGH when the

toggle position is "down" The /TERM_OFF will be

logic LOW when in the rocker "down" position.

The /LATCH pin will be logic HIGH in the rocker

"down" position.

The "FUSE" connection on the board is included to

connect the shield ground to the signal ground.

A 1-

Ω to 100Ω resistor can be placed into the FUSE

position. EIA-530, EIA-530A, and RS-449 stan-

dards state that a 100

Ω, 1/4W resistor should isolate

the shield or earth ground from the signal ground on

the DTE side.

Loopbacks and other testing can be easily performed

by the use of jumper wires or cables. All necessary

points on the boards are labelled. The SP507

Evaluation Board (Rev. A) schematic is shown on

Figure 36. The SP507EB (Rev A.) layout plot is

shown on Figure 38.

SP505, 506 and SP507 Retrofits

Along with our SP506 Evaluation (SP506EB) and

SP507 Evaluation Boards (SP507EB), Sipex also

offers SP506 or SP507 Retrofit Boards (SP506RB

and SP507RB). Shown in Figure 37, these retrofit

boards are design to map onto existing motherboards

and replace an existing serial port platform. These

boards are approximately 1.375" x 1.375" and

contain the four charge pump capacitors and one

Schottky diode needed for compliant operation.

The boards also have the connections for driver

inputs and outputs and receiver inputs and outputs.

Using a ribbon type cable or "flex-board", the analog

I/Os can be mapped to the appropriate pin assignment

on the serial port connector and the TLL/CMOS

I/Os to the HDLC serial controller IC. The equipment's

existing serial transceiver ICs can be depopulated

and replaced by the retrofit board.

Sipex usually prefers to perform the retrofitting

in-house. But the experienced designer can also retrofit

the serial port as well. Once connected properly, the

functionality and electrical performance will be

transparent to the user. Sipex will perform the

necessary testing to ensure the retrofit is electrically

transparent and complaint to the physical layer

specifications. Sipex has already passed homologation

testing per NET1/2 and TBR2 with this board

retrofitted onto a router.

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