7310-012703-2

TABLE 1. TRIG PHASE ANGLES (1)

PL INPUT

TRIG Ø

1

78°

37

2

86°

46

3

93°

53

4

100°

60

5

107°

69

6

112°

74

7

119°

79

8

127°

86

9

137°

92

10

149°

97

Ø

FIGURE 3.

TRIG PHASE ANGLE Ø

SYNC

TRIG

(1)

The TRIG Phase Angles shown in TABLE 1 are referenced to the

SYNC input. In the Application Schematic shown in Figure 4A,

SYNC is delayed by 7° from the AC line. Therefore, actual Phase

Angles with respect to the AC line are 7° less than TABLE 1 values.

TABLE 1 values are mask programmable.

(2)

The percentage of Full Power delivered to a resistive load by the

Triac Switch.

FIGURE 4 VALUE TABLE

CONDITION

C2(µF)

C5(µF)

(1), (3), (5)

0.22

100

(1), (3), (6)

0.10

100

(1), (4), (5)

0.47

220

(1), (4), (6)

0.33

220

(2), (3), (5)

0.47

220

(2), (3), (6)

0.33

220

(2), (4), (5)

0.68

220

(2), (4), (6)

0.47

220

(1) 33µs TRIG pulse (LS7310, LS7312)

(2) 1ms TRIG pulse (LS7311, LS7313)

(3) No LEDs

(4) 5mA LEDs

(5) 115VAC, C2 = 200V

(6) 220VAC, C2 = 400V

FIGURE 4 NOTES

NOTE 1: Value for 5mA LEDs

NOTE 2: Use zener which produces 6.2V ±5% at 500µA or

less, i.e. P/N MZ4627

NOTE 3: R6-C6 Snubber Network may be required for large

inductive loads.

NOTE 4: Tie all unused touch inputs together and return to Vss

through 100k Ohm, 1/4W resistor.

DRIVER

DRIVER

+

-

13

12

11

18

9

CONTROL

LOGIC

DRIVER

DIGITAL

COMPARATOR

POWER

LEVEL

ROM

PHASE

ANGLE

POINTER

PHASE-LOCKED

LOOP

AND

CLOCK

GENERATOR

LEVEL 1

LEVEL 10

15

14

+

-

+

-

+

-

+

-

+

-

TRIG

CAP

RUN

PULSE

OFF

PL1

PL10

17

FIGURE 2. LS7310-LS7313 BLOCK DIAGRAM

SYNC