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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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MB91F528 Arkusz danych(PDF) 207 Page - SPANSION |
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MB91F528 Arkusz danych(HTML) 207 Page - SPANSION |
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207 / 241 page  D a t a S h e et 204 MB91F528_DS705-00016-1v0-E, March 28, 2014 CONFIDENTIAL (4-2) UART (Asynchronous serial interface) timing Bit setting: SMR : MD2=0, SMR:MD1=0, SMR : MD0=0 Bit setting: SMR : MD2=0, SMR:MD1=0, SMR : MD0=1 When external clock is selected (BGR:EXT=1) (TA:-40°C to +125°C,VCC=AVCC=5.0V±10%/VCC=AVCC=3.3V±0.3V,VSS=AVSS=0.0V) Parameter Symb ol Pin name Conditio ns Value Unit Remarks Min Max Serial clock "L" pulse width tSLSH SCK0 to SCK19 - tCPP+10 - ns output pin: CL=50pF Serial clock "H"pulse width tSHSL tCPP+10 - ns SCK fall time tF - 5 ns SCK rise time tR - 5 ns (4-3) LIN Interface (v2.1)( Asynchronous Serial Interface for LIN (v2.1)) timing Bit setting: SMR : MD2=0, SMR:MD1=1, SMR : MD0=1 (TA:-40°C to +125°C,VCC=AVCC=5.0V±10%/VCC=AVCC=3.3V±0.3V,VSS=AVSS=0.0V) Parameter Symb ol Pin name Conditio ns Value Unit Remarks Min Max Serial clock "L" pulse width tSLSH SCK0 to SCK19 - tCPP+10 - ns output pin: CL=50pF Serial clock "H"pulse width tSHSL tCPP+10 - ns SCK fall time tF - 5 ns SCK rise time tR - 5 ns When external clock is selected SCK tSHSL VIL VIH VIH tR tSLSH tF VIL VIH VIL When external clock is selected SCK tSHSL VIL VIH VIH tR tSLSH tF VIL VIH VIL |
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