CS8900A datasheet(21/128 Pages) CIRRUS

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DS271PP3

CS8900A

Crystal LAN™ ISA Ethernet Controller

CIRRUS LOGIC PRODUCT DATA SHEET

3.4 Configurations with EEPROM

3.4.1 EEPROM Interface

The interface to the EEPROM consists of the four

signals shown in Table 5.

3.4.2 EEPROM Memory Organization

If an EEPROM is used to store initial configuration

information for the CS8900A, the EEPROM is or-

ganized in one or more blocks of 16-bit words. The

first block in EEPROM, referred to as the Configu-

ration Block, is used to configure the CS8900A af-

ter reset. An example of a typical Configuration

Block is shown in Table 6. Additional blocks con-

taining user data may be stored in the EEPROM.

However, the Configuration Block must always

start at address 00h and be stored in contiguous

memory locations.

3.4.3 Reset Configuration Block

The first block in EEPROM, referred to as the Re-

set Configuration Block, is used to automatically

program the CS8900A with an initial configuration

after a reset. Additional user data may also be

stored in the EEPROM if space is available. The

additional data are stored as 16-bit words and can

occupy any EEPROM address space beginning im-

mediately after the end of the Reset Configuration

Block up to address 7Fh, depending on EEPROM

size. This additional data can only be accessed

through software control (refer to Section 3.5 on

page 24 for more information on accessing the EE-

PROM). Address space 80h to AFh is reserved.

3.4.3.1 Reset Configuration Block Structure

The Reset Configuration Block is a block of contig-

uous 16-bit words starting at EEPROM address

00h. It can be divided into three logical sections: a

header, one or more groups of configuration data

words, and a checksum value. All of the words in

the Reset Configuration Block are read sequential-

ly by the CS8900A after each reset, starting with

the header and ending with the checksum. Each

group of configuration data is used to program a

PacketPage register (or set of PacketPage registers

in some cases) with an initial non-default value.

3.4.3.2 Reset Configuration Block Header

The header (first word of the block located at EE-

PROM address 00h) specifies the type of EE-

PROM used, whether or not a Reset Configuration

block is present, and if so, how many bytes of con-

figuration data are stored in the Reset Configura-

tion Block.

3.4.3.3 Determining the EEPROM Type

The LSB of the high byte of the header indicates

the type of EEPROM attached: sequential or non-

sequential. An LSB of 0 (XXXX-XXX0) indicates

a sequential EEPROM. An LSB of 1 (XXXX-

XXX1) indicates a non-sequential EEPROM. The

CS8900A works equally well with either type of

EEPROM. The CS8900A will automatically gen-

erate sequential addresses while reading the Reset

Configuration Block if a non-sequential EEPROM

is used.

3.4.3.4 Checking EEPROM for presence of Reset

Configuration Block

The read-out of either a binary 101X-XXX0 or

101X-XXX1 (X = do not care) from the high byte

of the header indicates the presence of configura-

tion data. Any other readout value terminates ini-

tialization from the EEPROM. If an EEPROM is

attached but not used for configuration, Crystal rec-

ommends that the high byte of the first word be

programmed with 00h in order to ensure that the

CS8900A Pin

(Pin #)

CS8900A Function

EEPROM

EECS (Pin 3)

EEPROM Chip Select

Chip Select

EESK (PIN 4)

1 MHz EEPROM

Serial Clock output

Clock

EEDO (Pin 5)

EEPROM Data Out

(data to EEPROM)

Data In

EEDI (Pin 6)

EEPROM Data in

(data from EEPROM)

Data Out

Table 5. EEPROM Interface

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