ICS8516 datasheet(11/15 Pages) ICST

11 / 15 page

8516FY

www.icst.com/products/hiperclocks.html

REV. B FEBRUARY 21, 2006

Integrated

Circuit

Systems, Inc.

ICS8516

LOW SKEW, 1-TO-16

DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP

LVDS DRIVER TERMINATION

A general LVDS interface is shown in Figure 3. In a 100

differential transmission line environment, LVDS drivers re-

quire a matched load termination of 100

Ω across near the

receiver input. For a multiple LVDS outputs buffer, if only par-

tial outputs are used, it is recommended to terminate the un-

used outputs.

FIGURE 3. TYPICAL LVDS DRIVER TERMINATION

3.3V

100

Zo = 50 Ohm

LVDS_Driver

HiPerClockS

CLK

nCLK

Zo = 50 Ohm

3.3V

FIGURE 4. ICS8516 LVDS BUFFER SCHEMATIC EXAMPLE

0.1u

(U1-12)

Zo = 50 Ohm

(U1-25)

LVDS_input

(U1-31)

Zo = 50 Ohm

0.1u

8516

nQ1

nQ0

GND

nCLK

CLK

GND

Q15

nQ15

Q14

nQ14

nQ6

nQ7

GND

OE1

OE2

GND

nQ8

nQ9

Zo = 50 Ohm

R16

100

Zo = 50 Ohm

VDD=3.3V

LVDS_input

Zo = 50 Ohm

VDD=3.3V

R10

100

0.1u

LVDS_Driver

R17

100

LVDS_input

(U1-1)

Decoupling capacitors located near the power pins

(U1-6)

(U1-36)

100

0.1u

SCHEMATIC EXAMPLE

Figure 4 shows a schematic example of ICS8516. In this ex-

ample, the input is driven by an LVDS driver. For LVDS buffer,

it is recommended to terminate the unused outputs for better

signal integrity. The decoupling capacitors should be physi-

cally located near the power pin.

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