CC1100-RTR1 datasheet(65/100 Pages) TI1

65 / 100 page

CC1100

SWRS038D

Page 65 of 92

0x03: FIFOTHR – RX FIFO and TX FIFO Thresholds

Bit

Field Name

Reset

R/W

Description

7:4

Reserved

R/W

Write 0 for compatibility with possible future extensions

3:0

FIFO_THR[3:0]

7 (0111)

R/W

Set the threshold for the TX FIFO and RX FIFO. The threshold is

exceeded when the number of bytes in the FIFO is equal to or higher

than the threshold value.

Setting

Bytes in TX FIFO

Bytes in RX FIFO

0 (0000)

1 (0001)

2 (0010)

3 (0011)

4 (0100)

5 (0101)

6 (0110)

7 (0111)

8 (1000)

9 (1001)

10 (1010)

11 (1011)

12 (1100)

13 (1101)

14 (1110)

15 (1111)

0x04: SYNC1 – Sync Word, High Byte

Bit

Field Name

Reset

R/W

Description

7:0

SYNC[15:8]

211 (0xD3)

R/W

8 MSB of 16-bit sync word

0x05: SYNC0 – Sync Word, Low Byte

Bit

Field Name

Reset

R/W

Description

7:0

SYNC[7:0]

145 (0x91)

R/W

8 LSB of 16-bit sync word

0x06: PKTLEN – Packet Length

Bit

Field Name

Reset

R/W

Description

7:0

PACKET_LENGTH

255 (0xFF)

R/W

Indicates the packet length when fixed packet length mode is enabled.

If variable packet length mode is used, this value indicates the

maximum packet length allowed.

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