DP83916 datasheet(51/96 Pages) NSC

51 / 96 page

50 Bus Interface (Continued)

53 SYSTEM CONFIGURATION

Any device that meets the SONIC-16 interface protocol and

electrical requirements (timing threshold and loading) can

be interfaced to SONIC-16 Since two bus protocols are pro-

vided via the BMODE pin the SONIC-16 can interface di-

rectly to most microprocessors

Figure 5-3 shows a typical

interface to the NationalIntel style bus (BMODEe0) and

Figure 5-4 shows a typical interface to the Motorola style

bus (BMODEe1)

The BMODE pin also controls byte ordering

When

BMODEe1 big endian byte ordering is selected and when

BMODEe0 little endian byte ordering is selected

54 BUS OPERATIONS

There are two types of system bus operations 1) SONIC-16

as a slave and 2) SONIC-16 as a bus master When

SONIC-16 is a slave (eg a CPU accessing SONIC-16 reg-

isters) all transfers are non-DMA When SONIC-16 is a bus

master (eg SONIC-16 accessing receive or transmit buff-

erdescriptor areas) all transfers are block transfers using

SONIC-16’s on-chip DMA

This section describes the

SONIC-16 bus operations Pay special attention to all sec-

tions labeled as ‘‘Note’’ These conditions must be met for

proper bus operation

TLF11722 – 25

FIGURE 5-3 SONIC-16 to NS32532 Interface Example

DP83916 Arkusz danych(PDF) 51 Page - National Semiconductor (TI)