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FPD87392 Arkusz danych(PDF) 21 Page - National Semiconductor (TI) |
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FPD87392 Arkusz danych(HTML) 21 Page - National Semiconductor (TI) |
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21 / 30 page ![]() Power Up Sequence (Defaults) When Power is ON, the TCON start to operate and generate the control signals by inputted LVDS signals. LVDS Receiver will take maximum 10 ms for the PLL wake-up time. Whether LVDS signals exist before the power-on doesn’t effect. When the Reset is reach to 2.0V, the R, G, B data and control signals are outputted sequentially and the sequence is just as following figure. 20104318 FIGURE 18. Power Up Sequence www.national.com 21 |
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