Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

MCP2003B Arkusz danych(PDF) 8 Page - Microchip Technology

Numer części MCP2003B
Szczegółowy opis  LIN Transceiver
PDF  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  MICROCHIP [Microchip Technology]
Strona internetowa  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP2003B Arkusz danych(HTML) 8 Page - Microchip Technology

Back Button MCP2003B Datasheet HTML 4Page - Microchip Technology MCP2003B Datasheet HTML 5Page - Microchip Technology MCP2003B Datasheet HTML 6Page - Microchip Technology MCP2003B Datasheet HTML 7Page - Microchip Technology MCP2003B Datasheet HTML 8Page - Microchip Technology MCP2003B Datasheet HTML 9Page - Microchip Technology MCP2003B Datasheet HTML 10Page - Microchip Technology MCP2003B Datasheet HTML 11Page - Microchip Technology MCP2003B Datasheet HTML 12Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 32 page
background image
MCP2003B
DS20005463C-page 8
 2015-2016 Microchip Technology Inc.
1.5.4.1
TXD Dominant Timeout
If TXD is driven low for longer than approximately
25 ms, the LBUS pin is switched to Recessive mode and
the part enters TOFF Mode. This is to prevent the LIN
node from permanently driving the LIN Bus dominant.
The transmitter is reenabled on TXD rising edge.
1.5.5
GROUND (VSS)
This is the Ground pin.
1.5.6
LIN BUS (LBUS)
The bidirectional LIN Bus pin (LBUS) is controlled by the
TXD input. LBUS has a current limited open collector
output. To reduce EMI, the edges during the signal
changes are slope controlled and include corner
rounding control for both falling and rising edges.
The internal LIN receiver observes the activities on the
LIN bus, and matches the output signal RXD to follow
the state of the LBUS pin.
1.5.6.1
Bus Dominant Timer
The Bus Dominant Timer is an internal timer that
deactivates the LBUS transmitter after approximately
25 ms of dominant state on the LBUS pin. The timer is
reset on any recessive LBUS state.
The LIN bus transmitter will be reenabled after a
recessive state on the LBUS pin as long as CS is high.
Disabling can be caused by the LIN bus being
externally held dominant, or by TXD being driven low.
1.5.7
BATTERY (VBB)
This is the Battery Positive Supply Voltage pin.
1.5.8
VOLTAGE REGULATOR ENABLE
OUTPUT (VREN)
This is the External Voltage Regulator Enable pin.
Open-drain output is pulled high to VBB in all modes
except Power-Down.
1.5.9
EXPOSED THERMAL PAD (EP)
Do not electrically connect, or connect to VSS.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32


Arkusz danych Pobierz

Go To PDF Page


Link URL



Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Link do karty katalogowej    |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com