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DM6380L Arkusz danych(PDF) 8 Page - List of Unclassifed Manufacturers

Numer części DM6380L
Szczegółowy opis  V.34 Integrated Data/ Fax/Voice/Speakerphone Modem Device Set
PDF  40 Pages
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Producent  ETC [List of Unclassifed Manufacturers]
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DM6380L Arkusz danych(HTML) 8 Page - List of Unclassifed Manufacturers

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DM336P
V.34 Integrated Data/ Fax/Voice/Speakerphone Modem Device Set
8
Final
Version: DM336P-DS-F02
August 15, 2000
DM6383 Functional Description
1. Operating Mode Selection
The DM6383 MCU can be used with both internal and
external modems. When it works within an internal
modem, pin TEST2 and TEST1 must be in a low state.
The DM6383 includes a virtual UART and supports a
parallel interface.
When DM6383 works within an external modem, pin
TEST2 must be in a low state, and pin TEST1 must
be in high. The virtual UART will be disabled and the
RS232 serial interface, enabled.
TEST2
TEST1
System Configuration
LOW
LOW
Internal Modem
LOW
HIGH
External Modem
HIGH
X
Test Mode
2. Micro-controller (80C31) Reference
DM6383 supports a bank switch control pin to switch
external program memory between lower 64K bytes
(bank 0) and upper 64K bytes (bank 1) of 27C010.
In this mode, two instructions must be included in
software to switch bank 0 to bank 1:
i.e.,
CLR
P1.3
JMP
BANK 1 ADDRESS
With the same way, it can also switch back to bank 0
by
SETB
P1.3
JMP
BANK 0 ADDRESS
* For detailed information about micro-controller,
please see Programmer's Guide to 8031.
3. Micro-controller Register Description
a. UART Clock Register :
Address D4000H Reset State: 06H
Write Only
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
X
dat6
dat5
dat4
dat3
dat2
dat1
0
The clock source of the virtual UART logic is fixed at
1.8432MHz. The clock is derived from the external
crystal used by the DM6383 controller. Therefore, the
UART 1.8432MHz clock must be obtained through
division. When the operating frequency of the
DM6383 controller changes, the divider should be
changed accordingly. This divider is specified by the
Configuration Register which can be written by the
DM6383 controller. The address mapping of the
register is D4000H: (DM6383 controller memory
mapping)
Bit 0: Always 0.
Bit 6-1: B6 - B1 define the clock di vider range from 2
to 64 (even number).
Bit 7: Not used.
b. UART Baud Generator Divisor Latch Register:
Address EC00H
Read only
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
dat7 dat6 dat5 dat4 dat3 dat2 dat1 dat0
By reading this register, the micro-controller can
monitor the value of the low byte divisor latch of the
virtual UART baud generator (see DLL in next section)
and determine the baud rate clock itself.
c. Modem Status Controller Register (MSCR):
Address E000H
Write only
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit
0
0000
/CTS /DSR /DCD /RI
The advantage of this register is that the modem line
status information can be passed to the virtual UART
by the micro-controller. The resulting signals are Ring
Detect (/RI), Carrier Detect (/DCD), Data Set Ready
(/DSR) and Clear To Send (/CTS).



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