IS25LP080D-JTLE1 datasheet(79/108 Pages) ISSI

Numer części	IS25LP080D-JTLE1

Szczegółowy opis	SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE

PDF	108 Pages

Scroll/Zoom	100%

Producent	ISSI [Integrated Silicon Solution, Inc]

Strona internetowa	http://www.issi.com

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79 / 108 page

IS25LP080D

IS25WP080D/040D/020D

Integrated Silicon Solution, Inc.- www.issi.com

Rev. A

09/02/2016

Figure 8.65 FRDDTR Sequence (with command decode cycles)

CE #

SCK

IO0

IO1

Instruction = BDh

CE #

SCK

IO0

IO1

3-byte Address

High Impedance

...

Mode 3

Mode 0

...

22 20 18

7 5 3 1 7 5 3 1 7 5 3 1 7 5 3 1 7 5 3 1 7 5 3 1

4 Dummy Cycles

23 21 19

Data Out

...

6 4 2 0 6 4 2 0 6 4 2 0 6 4 2 0 6 4 2 0 6 4 2 0

Data Out

16 14 12

17 15 13

7 5

6 4

3 1

2 0

Mode Bits

...

Mode Bits

...

Notes:

1. If the mode bits=AXh (

where X is don’t care), it can execute the AX read mode (without command). When the mode

bits are different from AXh, the device exits the AX read operation.

2. Number of dummy cycles depends on clock speed. Detailed information in Table 6.11 Read Dummy Cycles.

3. Sufficient dummy cycles are required to avoid I/O contention. If the number of dummy cycles and AX bit cycles are

same, then X should be Hi-Z.

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