VDP313XY datasheet(47/76 Pages) MICRONAS

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ADVANCE INFORMATION

VDP 313xY

Micronas

171

bit[11:0]

first line of macrovision detection window

(relative to vsync)

6MCV_START

172

bit[11:0]

last line of macrovision detection window

(relative to vsync)

MCV_STOP

Scaler Control Register

scaler mode register

bit[1:0]

scaler mode

linear scaling mode

nonlinear scaling mode, ’panorama’

nonlinear scaling mode, ’waterglass’

reserved

bit[10:2]

reserved, set to 0

bit[11]

scaler update

start scaler update command,

when the registers are updated the bit is set

to 1

0SCMODE

MODE

SCUP

luma offset register

bit[6:0]

luma offset 0..127

ITU-R output format:

CVBS output format:

this register is updated when the scaler mode register is written

YOFFS

active video length for 1-h FIFO

bit[11:0]

length in pixels

this register is updated when the scaler mode register is written

1080

FFLIM

scaler1 coefficient, this scaler is compressing the signal.

For compression by a factor c the value c*1024 is required.

bit[11:0]

allowed values from 1024..4095

this register is updated when the scaler mode register is written

1024

SCINC1

scaler2 coefficient, this scaler is expanding the signal.

For expansion by a factor c the value 1/c*1024 is required.

bit[11:0]

allowed values from 256..1024

this register is updated when the scaler mode register is written

1024

SCINC2

scaler1/2 nonlinear scaling coefficient

this register is updated when the scaler mode register is written

SCINC

47 -

scaler1 window controls, see table

5 12-bit registers for control of the nonlinear scaling

this register is updated when the scaler mode register is written

SCW1_0 - 4

Table 2–6: Control Registers of the Fast Processor for control of the video frontend functions

−default values are initializied at reset

FP Sub-

address

Function

Default

Name

(hex)

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