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MP7226LS Arkusz danych(PDF) 11 Page - Exar Corporation |
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MP7226LS Arkusz danych(HTML) 11 Page - Exar Corporation |
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11 / 16 page ![]() MP7226 11 Rev. 2.00 – + Figure 7. Digitally Programmable Offset Adjustment Circuits DAC Output VOFFSET VOUT VOUT = Dn X VREF + VOFFSET where Dn is the digital input code and can vary 0 to 255 – + DAC Output1 VOUT VOUT = Dn1 X VREF + Dn2 X VREF where Dn is the digital input code and can vary 0 to 255 DAC Output2 RR R R RR R R VREF VDD VOUT –5 V or GND AGND DAC – + Figure 8. Digitally Programmable AC Reference Input Signal Circuit (DC Couple) – + AC Reference Input DAC or DC Voltage +15 V VSS Offsetting DAC Outputs Figure 7. shows examples of offset circuits. DAC offset effects When using the device in single supply applications, and minimum reference voltage, there is a possibility that the DAC output will not change when the code is incremented from 0. Once the DAC has reached the offset voltage of the output buffer, the DAC output will begin to increment in a normal opera- tion. 5V Operation The MP7226 can be operated with a single power supply (VDD = +5V ) or dual power supplies ( VDD = +5V and VSS = –5V) . The reference voltage range is reduced along with Some performance parameter degradation. However the DNL of each DAC remains at 1 LSB guaranteeing monotonicity. |
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