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Zakładka z wyszukiwarką danych komponentów |
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STM32F091 Arkusz danych(PDF) 80 Page - STMicroelectronics |
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STM32F091 Arkusz danych(HTML) 80 Page - STMicroelectronics |
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80 / 127 page  Electrical characteristics STM32F091xB STM32F091xC 80/127 DocID026284 Rev 3 All I/Os are CMOS- and TTL-compliant (no software configuration required). Their characteristics cover more than the strict CMOS-technology or TTL parameters. The coverage of these requirements is shown in Figure 22 for standard I/Os, and in Figure 23 for 5 V-tolerant I/Os. The following curves are design simulation results, not tested in production. RPU Weak pull-up equivalent resistor (3) VIN = VSS 25 40 55 k Ω RPD Weak pull-down equivalent resistor(3) VIN = VDDIOx 25 40 55 k Ω CIO I/O pin capacitance - - 5 - pF 1. Data based on design simulation only. Not tested in production. 2. The leakage could be higher than the maximum value, if negative current is injected on adjacent pins. Refer to Table 52: I/O current injection susceptibility. 3. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This PMOS/NMOS contribution to the series resistance is minimal (~10% order). Table 53. I/O static characteristics (continued) Symbol Parameter Conditions Min Typ Max Unit |
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