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AT9919 Arkusz danych(PDF) 9 Page - Microchip Technology |
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AT9919 Arkusz danych(HTML) 9 Page - Microchip Technology |
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9 / 16 page ![]() 2016 Microchip Technology Inc. DS20005595A-page 9 AT9919 3.11 PCB Layout Guidelines Careful PCB layout is critical to achieving low switching losses and stable operation. Use a multilayer board whenever possible for better noise immunity. Minimize ground noise by connecting high-current ground returns, the input bypass capacitor ground lead and the output filter ground lead to a single point (star ground configuration). The fast di/dt loop is composed of the input capacitor CIN, the freewheeling diode and the MOSFET. To minimize noise interaction, this loop area should be as small as possible. Place RSENSE as close as possible to the input filter and VIN. For better noise immunity, a Kelvin connection is strongly recommended between CS and RSENSE. Connect the exposed tab of the IC to a large area ground plane for improved power dissipation. |
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