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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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STW4510 Arkusz danych(PDF) 39 Page - STMicroelectronics |
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STW4510 Arkusz danych(HTML) 39 Page - STMicroelectronics |
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39 / 57 page  Obsolete Product(s) - Obsolete Product(s) STw4510 Electrical and timing characteristics 39/57 Vsdc2 regulator in sleep mode (SLEEP=’1’) VBAT Input power supply 2.7 3.6 5.5 V VOUT Output voltage(1) -3 % 1.8 +3 % V VRIPPLE Output ripple IOUT = 5 mA 10 mV IOUT Output current 10 mA PEFF Power efficiency IOUT = 5 mA 90 % I (3) Q Quiescent current IOUT = 0 mA 2 µA Lir Line regulation [VBAT [2.7; 5.5] V 10 mV Ldr Load regulation IOUT: [0.1; 10] mA 10 mV Lirt Transient line regulation IOUT = 5 mA Δ VBAT= 300 mV tR = tF = 10 µs 2mV 1. Including output voltage temperature coefficient, DC line and load regulations, voltage reference accuracy, industrial manufacturing tolerances and ripple voltage due to switching. 2. Guaranteed by design 3. Quiescent current defined is the current measured on the power supply dedicated to the voltage Vsdc2 Table 19. Vsdc2 DC/DC step-down converter (continued) Symbol Description Test conditions Min. Typ. Max. Units |
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