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LM2633 Arkusz danych(PDF) 39 Page - National Semiconductor (TI) |
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LM2633 Arkusz danych(HTML) 39 Page - National Semiconductor (TI) |
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39 / 40 page ![]() PCB Layout Guidelines (Continued) 11. VLIN5 pin decoupling capacitor should be connected to the local analog ground. 12. Compensation components should be placed close to the IC, within 1 to 2 centimeters. 13. Channel 3 should use the analog ground, not the power ground, to avoid potential noise coupling from the switching channels. An example of the power stage layout is shown in Figure 22. 20000883 FIGURE 22. PCB Layout Example www.national.com 39 |
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