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PCA84C441 Arkusz danych(PDF) 10 Page - NXP Semiconductors |
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PCA84C441 Arkusz danych(HTML) 10 Page - NXP Semiconductors |
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10 / 40 page ![]() 1996 Nov 29 10 Philips Semiconductors Product specification 8-bit microcontrollers with OSD and VST 84C44X; 84C64X; 84C84X 8 ANALOG CONTROL 8.1 6-bit PWM DACs Five PWM outputs are available for analog control purposes e.g. volume, balance, brightness, saturation, etc. The block diagram of a typical 6-bit PWM DAC is shown in Fig.8. Each PWM output can generate pulses of programmable length that have a repetition frequency of 1 ⁄64 × fPWM, where fPWM = 1⁄3 × fXTAL. 8.1.1 PIN SELECTION FOR PWM OUTPUTS The PWM outputs PWM1 to PWM5, share the same pins as the Derivative Port lines DP0.1 to DP0.5. Setting the (relevant PWM enable) bit PWMnE to: • Logic 1, selects the relevant PWMx output function • Logic 0, selects the relevant DP0.x Port function. 8.1.2 POLARITY OF THE PWM OUTPUTS The polarity of all five PWM outputs is selected by the state of the polarity control bit P6LVL. Setting the control bit P6LVL to: • Logic 0, sets the PWMx outputs to the default polarity • Logic 1, inverts all the PWMx outputs. 8.1.3 ANALOG OUTPUT VOLTAGE A DC voltage proportional to the PWM control setting may be obtained by connecting an integrating network to each of the PWM outputs (see Fig.9). The analog value is calculated as follows: Where: • • • • PWMDL is the decimal value of the contents of the PWM data latch. Therefore, the analog output voltage is: V A t HIGH t r -------------- V O × = t HIGH t 0 PWMDL × HIGH time of the PWM pulse == t r t 0 64 × repetition time of the PWM pulse == t 0 3 f XTAL -------------- = V A PWMDL 64 ------------------------ V O × = Fig.8 Block diagram of the 6-bit PWM DAC. handbook, full pagewidth MCD176 DP0.x data I/O DP0.x/PWMx 6-BIT PWM DATA LATCH P6LVL PWMnE 6-BIT DAC PWM CONTROLLER Q Q polarity control bit f PWM |
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