ADL5721ACPZN-R7 datasheet(12/16 Pages) AD

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Data Sheet

ADL5721

Rev. 0 | Page 11 of 15

APPLICATIONS INFORMATION

LAYOUT

Solder the exposed pad on the underside of the ADL5721 to a

low thermal and electrical impedance ground plane. This pad is

typically soldered to an exposed opening in the solder mask on

the evaluation board. Connect these ground vias to all other

ground layers on the evaluation board to maximize heat

dissipation from the device package.

Figure 23. Evaluation Board Layout for the ADL5721 Package

DIFFERENTIAL vs. SINGLE-ENDED OUTPUT

This section provides the test results that compare the ADL5721

using a differential vs. a single-ended output. When using the

device as a single-ended output, use the RFOP output of the

evaluation board and terminate RFON to 50 Ω. Note that the

converse can be done as well; however, doing so produces slightly

different results from the plots shown in this section, caused by

some amplitude imbalance between the two differential ports,

RFOP and RFON. The output trace and connector loss were not

deembedded for these measurements.

Note that this performance is typical and not guaranteed.

5.9

6.0

6.1

6.2

6.3

6.4

6.5

6.6

6.7

6.8

6.9

7.0

7.1

7.2

FREQUENCY (GHz)

Figure 24. Gain vs. Frequency, BAND = 0 V

7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 8.0 8.1 8.2 8.3 8.4 8.5

FREQUENCY (GHz)

Figure 25. Gain vs. Frequency, BAND = 1.8 V

5.9

6.0

6.1

6.2

6.3

6.4

6.5

6.6

6.7

6.8

6.9

7.0

7.1

7.2

FREQUENCY (GHz)

Figure 26. Noise Figure vs. Frequency, BAND = 0 V

7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 8.0 8.1 8.2 8.3 8.4 8.5

FREQUENCY (GHz)

Figure 27. Noise Figure vs. Frequency, BAND = 1.8 V

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