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DS2120B Arkusz danych(PDF) 2 Page - Dallas Semiconductor

Numer części DS2120B
Szczegółowy opis  Ultra3 LVD SCSI Terminator
PDF  10 Pages
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Producent  DALLAS [Dallas Semiconductor]
Strona internetowa  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS2120B Arkusz danych(HTML) 2 Page - Dallas Semiconductor

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REFERENCE DOCUMENTS
Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface (SPI)
Project: 0855-M, 1995
Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface 2 (SPI-2) Project: 1142-M, 1998
Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface 3 (SPI-3) Project: 1302-D, 1999
Small Computer Systems Interface (SCSI-3) SCSI Parallel Interface 4 (SPI-4) Project: 1365-D, 200x
Available from:
American National Standards Institute (ANSI) Phone: 212-642-4900
Global Engineering Documents 15 Inverness Way East; Englewood, CO 80112 Phone: 800-854-7179
FUNCTIONAL DESCRIPTION
The DS2120 combines LVD termination with DIFFSENSE sourcing and detection.
LVD termination is provided by a laser-trimmed resistor biased with two current sources and a common-
mode voltage source, generated from a bandgap reference of 1.25V. The configuration is a y-type
terminator with a 105
Ω differential and 150Ω common-mode resistance. A fail-safe bias of 112mV is
maintained when no drivers are connected to the SCSI bus. In non-LVD mode, the resistors are isolated
from the bus.
The DIFF_CAP pin of DS2120 monitors the DIFFSENS line to determine the proper operating mode of
the device. If the voltage on the DIFF_CAP is between 0.7V and 1.9V, the device enters LVD mode after
the mode-change delay. If the voltage at the DIFF_CAP later crosses one of the thresholds, the DS2120
again changes modes after the mode-change delay. The mode-change delay is the same when changing in
or out of LVD mode. A new mode change can start anytime after a previous mode change has been
detected. These modes are the following:
LVD Mode: LVD termination is provided by a precision laser-trimmed resistor string with two current
sources. This configuration yields a 105
Ω differential and 150Ω common-mode impedance. A fail-safe
bias of 112mV is maintained when no drivers are connected to the SCSI bus.
SE Isolation Mode: The DS2120 identifies that there is a SE (single-ended) device on the SCSI bus and
isolates the termination pins from the bus.
HVD Isolation Mode: The DS2120 identifies that there is an HVD device on the SCSI bus and isolates
the termination pins from the bus.
When ISO is pulled high, the termination pins are isolated from the SCSI bus and VREF remains active.
The mode-change delay/filter is still active and the LVD pin continues to indicate the correct bus mode.
During thermal shutdown, the termination pins are isolated from the SCSI bus and VREF becomes high
impedance. The DIFFSENS driver is shut down during either of these two events. The DIFF_CAP
receiver is disabled and the LVD goes low, indicating a non-LVD condition.
To ensure proper operation, the TPWR pin should be connected to the SCSI bus TERMPWR line. As
with all analo g circuitry, the TERMPWR and VDD lines should be bypassed locally. A 2.2
µF capacitor
and a 0.01
µF high-frequency capacitor are recommended between TPWR and ground and placed as close
as possible to the DS2120. The DS2120 should be placed as close as possible to the SCSI connector to
minimize signal and power trace length, thereby lessening input capacitance and reflections that can
degrade the bus signals.



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