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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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LMF100CIWM Arkusz danych(PDF) 3 Page - National Semiconductor (TI) |
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LMF100CIWM Arkusz danych(HTML) 3 Page - National Semiconductor (TI) |
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3 / 28 page  Electrical Characteristics (Continued) The following specifications apply for Mode 1, Q = 10 (R 1 = R3 = 100k, R2 = 10k), V + = +5V and V− = −5V unless otherwise specified. Boldface limits apply for T MIN to TMAX; all other limits TA = TJ = 25˚C. Symbol Parameter Conditions LMF100CCN LMF100CIWM Units Typical (Note 8) Tested Limit (Note 9) Design Limit (Note 10) Typical (Note 8) Tested Limit (Note 9) Design Limit (Note 10) IIN Input Current on Pins: 4, 5, 10 10 µA 6, 9, 10, 11, 12, 16, 17 Electrical Characteristics The following specifications apply for Mode 1, Q = 10 (R 1 = R3 = 100k, R2 = 10k), V + = +2.50V and V− = −2.50V unless oth- erwise specified. Boldface limits apply for T MIN to TMAX; all other limits TA = TJ = 25˚C. Symbol Parameter Conditions LMF100CCN LMF100CIWM Units Typical (Note 8) Tested Limit (Note 9) Design Limit (Note 10) Typical (Note 8) Tested Limit (Note 9) Design Limit (Note 10) Is Maximum Supply Current fCLK = 250 kHz No Input Signal 812 12 8 12 mA f0 Center Frequency MIN 0.1 0.1 Hz Range MAX 50 50 kHz fCLK Clock Frequency MIN 5.0 5.0 Hz Range MAX 1.5 1.5 MHz fCLK/f0 Clock to Center VPin12 = 2.5V or 0V ±0.2 ±1 ±1 ±0.2 ±1 % Frequency Ratio Deviation fCLK = 1 MHz Q Error (MAX) Q = 10, Mode 1 (Note 4) VPin12 = 5V or 0V ±0.5 ±5 ±8 ±0.5 ±8 % fCLK = 1 MHz HOBP Bandpass Gain at f0 fCLK = 1 MHz 0 ±0.4 ±0.5 0 ±0.5 dB HOLP DC Lowpass Gain R1 = R2 = 10k 0 ±0.2 ±0.2 0 ±0.2 dB fCLK = 250 kHz VOS1 DC Offset Voltage (Note 5) fCLK = 250 kHz ±5.0 ±15 ±15 ±5.0 ±15 mV VOS2 DC Offset Voltage (Note 5) fCLK = 250 kHz SA/B = V + ±20 ±60 ±60 ±20 ±60 mV SA/B = V − ±10 ±50 ±60 ±10 ±60 mV VOS3 DC Offset Voltage (Note 5) fCLK = 250 kHz ±10 ±25 ±30 ±10 ±30 mV Crosstalk (Note 6) A Side to B Side or −65 −65 dB B Side to A Side Output Noise (Note 12) fCLK = 250 kHz N 25 25 20 kHz Bandwidth BP 250 250 µV 100:1 Mode LP 220 220 Clock Feedthrough (Note 13) fCLK = 250 kHz 100:1 Mode 2 2 mV VOUT Minimum Output RL = 5k +1.6 ±1.5 ±1.4 +1.6 ±1.4 V Voltage Swing (All Outputs) −2.2 −2.2 RL = 3.5k +1.5 +1.5 V (All outputs) −2.1 −2.1 GBW Op Amp Gain BW Product 5 5 MHz SR Op Amp Slew Rate 18 18 V/µs Isc Maximum Output Short Circuit Source (All Outputs) 10 10 mA Current (Note 7) Sink 20 20 mA www.national.com 3 |
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