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L5988D Arkusz danych(PDF) 35 Page - STMicroelectronics |
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L5988D Arkusz danych(HTML) 35 Page - STMicroelectronics |
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35 / 52 page ![]() DocID15324 Rev 4 35/52 L5988D Application information 52 In Figure 18 is shown the module and phase of the open loop gain. The bandwidth is about 42 kHz and the phase margin is 56°. Figure 18. Open loop gain bode diagram with high ESR output capacitor The response of the system to a load transition in terms of output voltage regulation is affected not only by the designed compensation network but it also rely on the selection of the power components (the inductor value, for example, limits the slew rate of the current). |
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