PC8477B datasheet(9/54 Pages) NSC

9 / 54 page

30 Register Description

The following PC8477B registers are mapped into the ad-

dresses shown below with the base address range being

provided by the CS pin For PC-AT or PS2 applications the

diskette controller primary address range is 3F0 to 3F7

(hex) and the secondary address range is 370 to 377 (hex)

The PC8477B supports three different register modes the

PC-AT mode PS2 mode (Models 506080) and the Mod-

el 30 mode (Model 30) See Section 51 for more details on

how each register mode is enabled When applicable the

If no special notes are made then the register is valid for all

three register modes

TABLE 3-1 Register Description and Addresses

IDENT

Status Register A

SRA

Status Register B

SRB

Digital Output Register

DOR

Tape Drive Register

TDR

Main Status Register

MSR

Data Rate Select Register

DSR

Data Register (FIFO)

FIFO

None (Bus TRI-STATE)

Digital Input Register

DIR

Configuration Control Register

CCR

Note

SRA and SRB are enabled by IDENT e 0 during a chip reset only

31 STATUS REGISTER A (SRA)

Read Only

This is a read only diagnostic register that is part of the

PS2 floppy controller register set and is enabled when in

the PS2 or Model 30 mode This register monitors the state

of the INT pin and some of the disk interface signals The

state of these bits is independent of the INVERT pin The

SRA can be read at any time when in PS2 mode In the

PC-AT mode D7 – D0 are TRI-STATE during a mP read

311 SRAPS2 Mode

DESC

INT

DRV2 STEP TRK0 HDSEL INDX WP DIR

PEND

RESET

NA NA

COND

Interrupt Pending

This active high bit reflects

the state of the INT pin

2nd Drive Installed

Active low status of the

DRV2 disk interface input indicating if a second

drive has been installed

Step

Active high status of the STEP disk inter-

face output

Track 0

Active low status of the TRK0 disk in-

terface input

Head Select

Active high status of the HDSEL

disk interface output

Index

Active low status of the INDEX disk in-

terface input

Write Protect

Active low status of the WP disk

interface input

Direction

Active high status of the DIR disk in-

terface output

312 SRA

Model 30 Mode

DESC

INT

DRQ STEP TRK0 HDSEL INDX WP DIR

PEND

RESET

NA NA

COND

Interrupt Pending

This active high bit reflects

that state of the INT pin

DMA Request

Active high status of the DRQ

signal

Step

Active high status of the latched STEP

disk interface output This bit is latched with the

STEP output going active and is cleared with a

read from the DIR or with a hardware or soft-

ware reset

Track 0

Active high status of TRK0 disk inter-

face input

Head Select

Active low status of the HDSEL

disk interface output

Index

Active high status of the INDEX disk in-

terface input

Write Protect

Active high status of the WP

disk interface input

Direction

Active low status of the DIR disk in-

terface output

32 STATUS REGISTER B (SRB)

Read Only

This is a read only diagnostic register that is part of the

PS2 floppy controller register set and is enabled when in

the PS2 or Model 30 mode The state of these bits is inde-

pendent of the INVERT pin The SRB can be read at any

time when in PS2 mode In the PC-AT mode D7 – D0 are

TRI-STATE during a mP read

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