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PM8801 Arkusz danych(PDF) 10 Page - STMicroelectronics

Numer części PM8801
Szczegółowy opis  High-efficiency, IEEE 802.3at compliant, integrated PoE-PD interface and PWM controller
PDF  37 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PM8801 Arkusz danych(HTML) 10 Page - STMicroelectronics

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Pin descriptions and connection diagram
PM8801
10/37
DocID018560 Rev 2
2
Pin descriptions and connection diagram
Figure 5. Pin connections (top view)
Table 2. Pin descriptions
Pin#
Name
Function
1ENSL
Sleep mode input: active-low signal.
An optocoupler may be used to force the PM8801 to enter into sleep mode, shutting
down its internal DC/DC controller.
2
ENDC
MPS duty cycle / LED enable: active-low signal.
Drive this pin low to disable the LED driver during normal operations.
Entering sleep mode the host of the PoE-PD may drive this pin through an
optocoupler to set the MPS current profile. The signal value is sampled on the
ENSL pin during transition to sleep mode. If low the MPS current is pulsed, if high
the MPS current is constant.
3CTL
Input of the pulse width modulator.
CTL pull-up to VB is provided by an external resistor which may be used to bias an
opto-coupler transistor.
4VB
5 V, up to 10 mA bias regulator.
This reference voltage can be used to bias an opto-coupler transistor.
In sleep mode VB regulator is switched off.
5CS
Current sense input for current mode control and overcurrent protection.
Current sensing is accomplished using a dedicated current sense comparator. If the
CS pin voltage exceeds 0.5 V, the GAT1 pin switches low for cycle-by-cycle current
limiting. CS is internally held low for 60 ns after GAT1 switches high to blank leading
edge current spikes.
6RTN1
Power ground for the GAT1 driver.
This pin must be connected to RTN2 and ARTN.
1
2
3
4
SA
DIM
FRS
T2P
RTN1
CS
VB
CTL
DET
NC
CLS
DT
ARTN
GAT2
VC
GAT1
5
6
7
8
13
14
15
16
VSS
RTN2
9
10
VDD
VDD
17
18
19
20
11
12
21
22
23
24
ENSL
ENDC
LED
WKUP
AM045037v1



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