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L6751 Arkusz danych(PDF) 13 Page - STMicroelectronics |
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L6751 Arkusz danych(HTML) 13 Page - STMicroelectronics |
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13 / 59 page ![]() L6751 Pin description and connection diagrams Doc ID 023992 Rev 1 13/59 B23 SVCLK SVC D Serial clock. A26 ALERT# V_FIX D Alert (Intel mode). V_FIX (AMD mode). Pull to 3.3 V to enter V_FIX mode. B24 SVDATA SVD D Serial data. A27 BOOT / TMAX A Connect a resistor divider to GND/VCC5 in order to define BOOT and TMAX registers. See Table 10 for details. D4 VCC5 A Main IC power supply. Operative voltage is 5 V ± 5%. Filter with 1 μF MLCC to GND (typ.). A28 GDC A Gate drive control pin. Used for efficiency optimization, see Section 9 for details. If not used, it can be left floating. Always filter with 1 μF MLCC to GND. B25 NC - Not internally bonded. A29 VDRV A Driving voltage for external drivers. Connect to the selected voltage rail to drive external MOSFET when in maximum power conditions. IC switches GDC voltage between VDRV and VCC5 to implement efficiency optimization according to selected strategies. B26 NC - Not internally bonded. Table 2. Pin description (continued) Pin# Name Type Function |
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