SPC560P34L1 datasheet(34/103 Pages) STMICROELECTRONICS

34 / 103 page

Package pinouts and signal descriptions

SPC560P34L1, SPC560P34L3, SPC560P40L1,

34/103

Doc ID 16100 Rev 7

2.2.2

System pins

Table 6 and Table 7 contain information on pin functions for the SPC560P34/SPC560P40

devices. The pins listed in Table 6 are single-function pins. The pins shown in Table 7 are

multi-function pins, programmable via their respective pad configuration register (PCR)

values.

VDD_LV_COR2

1.2 V supply pins for core logic and code Flash. Decoupling capacitor

must be connected between these pins and the nearest VSS_LV_COR

pin.

VSS_LV_COR2

1.2 V supply pins for core logic and code Flash. Decoupling capacitor

must be connected betwee.n these pins and the nearest VDD_LV_COR

pin.

Analog supply/ground and high/low reference lines are internally physically separate, but are shorted via a double-bonding

connection on VDD_HV_ADCx/VSS_HV_ADCx pins.

Table 5.

Supply pins (continued)

Supply

Symbol

Description

64-pin

100-pin

Table 6.

System pins

Symbol

Description

Direction

Pad speed(1)

SRC = 0 SRC = 1 64-pin 100-pin

Dedicated pins

NMI

Non-maskable Interrupt

Input only

Slow

—

XTAL

Analog output of the oscillator amplifier

circuit—needs to be grounded if oscillator is

used in bypass mode

——

—

EXTAL

Analog input of the oscillator amplifier circuit,

when the oscillator is not in bypass mode

Analog input for the clock generator when the

oscillator is in bypass mode

——

—

TDI

JTAG test data input

Input only

Slow

—

TMS

JTAG state machine control

Input only

Slow

—

TCK

JTAG clock

Input only

Slow

—

TDO

JTAG test data output

Output only

Slow

Fast

Reset pin

RESET

Bidirectional reset with Schmitt trigger

characteristics and noise filter

Bidirectional

Medium

—

Test pin

VPP_TEST

Pin for testing purpose only. To be tied to

ground in normal operating mode.

——

—

SRC values refer to the value assigned to the Slew Rate Control bits of the pad configuration register.

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