 |
Zakładka z wyszukiwarką danych komponentów |
|
|
Zakładka z wyszukiwarką danych komponentów |
|
ST72325AR7-Auto Arkusz danych(PDF) 71 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST72325AR7-Auto Arkusz danych(HTML) 71 Page - STMicroelectronics |
|
|
71 / 243 page  Obsolete Product(s) - Obsolete Product(s) ST72325xxx-Auto Power saving modes Doc ID 13770 Rev 3 71/243 ones which get their clock supply from another clock generator (such as an external or auxiliary oscillator). The compatibility of Watchdog operation with Halt mode is configured by the ‘WDGHALT’ option bit of the option byte. The HALT instruction when executed while the Watchdog system is enabled, can generate a Watchdog RESET (see Section 21.1.1: Flash configuration for more details). Figure 29. Halt timing overview HALT RUN RUN 256 OR 4096 CPU CYCLE DELAY RESET OR INTERRUPT HALT INSTRUCTION FETCH VECTOR [MCCSR.OIE = 0] |
|
Link URL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Link do karty katalogowej | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Polish ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
