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STM32F779IGH7 Arkusz danych(PDF) 48 Page - STMicroelectronics |
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STM32F779IGH7 Arkusz danych(HTML) 48 Page - STMicroelectronics |
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48 / 255 page ![]() Functional overview STM32F777xx STM32F778Ax STM32F779xx 48/255 DocID028294 Rev 4 2.38 Management Data Input/Output (MDIO) slaves The devices embed a MDIO slave interface it includes the following features: • 32 MDIO Registers addresses, each of which is managed using separate input and output data registers: – 32 x 16-bit firmware read/write, MDIO read-only output data registers – 32 x 16-bit firmware read-only, MDIO write-only input data registers • Configurable slave (port) address • Independently maskable interrupts/events: – MDIO Register write – MDIO Register read – MDIO protocol error • Able to operate in and wake up from STOP mode 2.39 Cryptographic acceleration The devices embed a cryptographic accelerator. This cryptographic accelerator provides a set of hardware acceleration for the advanced cryptographic algorithms usually needed to provide confidentiality, authentication, data integrity and non repudiation when exchanging messages with a peer. • These algorithms consist of: Encryption/Decryption – DES/TDES (data encryption standard/triple data encryption standard): ECB (electronic codebook) and CBC (cipher block chaining) chaining algorithms, 64-, 128- or 192-bit key – AES (advanced encryption standard): ECB, CBC, GCM, CCM, and CTR (counter mode) chaining algorithms, 128, 192 or 256-bit key Universal hash – SHA-1 and SHA-2 (secure hash algorithms) – MD5 – HMAC The cryptographic accelerator supports DMA request generation. 2.40 Random number generator (RNG) All the devices embed an RNG that delivers 32-bit random numbers generated by an integrated analog circuit. 2.41 General-purpose input/outputs (GPIOs) Each of the GPIO pins can be configured by software as output (push-pull or open-drain, with or without pull-up or pull-down), as input (floating, with or without pull-up or pull-down) or as peripheral alternate function. Most of the GPIO pins are shared with digital or analog alternate functions. All GPIOs are high-current-capable and have speed selection to better manage internal noise, power consumption and electromagnetic emission. |
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