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DEMO-MGA-83A Arkusz danych(PDF) 7 Page - Broadcom Corporation. |
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DEMO-MGA-83A Arkusz danych(HTML) 7 Page - Broadcom Corporation. |
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7 / 22 page ![]() 7 MGA-83563 Applications Information The MGA-83563 is two-stage, medium power GaAs RFIC amplifier designed to be used for driver and output stages in transmitter applications operating within the 500 MHz to 6 GHz frequency range. This device is designed for operation in the saturated mode where it delivers a typical output power of +22 dBm (158 mW) with a power-added efficiency of 37%. The MGA-83563 has a large signal gain of 18 dB requiring an input signal level of only +4 dBm to drive it well into satu- ration. The high output power and high efficiency of the MGA-83563, combined with +3-volt operation and sub- miniature packaging, make this device especially useful for battery-powered, personal communication applications such as wireless data, cellular phones, and PCS. The upper end of the frequency range of the MGA-83563 extends to 6 GHz making it a useful solution for medium power amplifiers in wireless communications products such as 5.7 GHz spread spectrum or other ISM/license- free band applications. Internal capacitors on the RFIC chip limit the low-end frequency response to applica- tions above approximately 500 MHz. The thermal limitations of the subminiature SOT-363 (SC-70) package generally restrict the use of the MGA- 83563 to applications that use constant envelope types of modulation. These types of systems are able to take full advantage of the MGA-83563’s high efficiency, satu- rated mode of operation. The use of the MGA-83563 for linear applications at reduced power levels is discussed in the “Thermal Design for Reliability” and “Use of the MGA-83563 for Linear Applications” in this applications note. Application Guidelines The use of the MGA-83563 is very straightforward. The on-chip, partial RF impedance matching and integrated bias control circuit simplify the task of using this device. The design steps consist of (1) selecting an interstage in- ductor from the data provided, (2) adding provision for bringing in the DC bias, and (3) designing and optimizing an output impedance match for the particular frequency band of interest. The input is already well matched to 50 ohms for most frequencies and in many cases no addi- tional input matching will be necessary. Each of the three design steps for using the MGA-83563 will now be discussed in greater detail. Step 1 — Selecting the Interstage Inductor The drain of the first stage FET of this two-stage RFIC am- plifier is connected to package Pin 1. The supply voltage Vd is connected to this drain through an inductor, L2, as shown in Figure 18. The supply end of the inductor is by- passed to ground. This interstage inductor serves the purpose of complet- ing the impedance match between the first and second stages. The value of inductor L2 depends on the particu- lar frequency for which the MGA-83563 is to be used and is chosen from the look-up graph in Figure 19. RF Input RF Input RFC Vd 3 L2 1 6 Figure 18. Interstage Inductor L2 and Bias Current. The values for inductor L2 are somewhat dependent on the specific printed circuit board material, thickness, and RF layout that are used. The inductor values shown in Figure 19 have been created for the PCB and RF layout that is used for the circuit examples presented in this ap- plication note. The methodology that was used to deter- mine the optimum values for L2 and for creating Figure 19 is presented in the Appendix. If the user’s PCB and/or layout differ significantly from the example circuits, refer to the Appendix for a description of how to determine the values of L2 for any arbitrary frequency, PCB material, or RF layout. Step 2 — Bias Connections The MGA-83563 is a voltage-biased device and operates from a single, positive power supply. The supply voltage, typically +3-volts, must be applied to the drains of both stages of the RFIC amplifier. The connection to the first stage drain is made through the interstage inductor, L2, as described in the previous step. The supply voltage is applied to the second stage drain through Pin 6, which is also the RF Output connection. Referring to Figure 18, an inductor (RFC) is used to separate the RF output signal from the DC supply. The supply side of the RFC is capaci- tively bypassed. A DC blocking capacitor is used at the output to isolate the supply voltage from the succeeding stage. |
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