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ICS84329AM-01LF Arkusz danych(PDF) 13 Page - Integrated Device Technology

Numer części ICS84329AM-01LF
Szczegółowy opis  700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
PDF  20 Pages
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Producent  IDT [Integrated Device Technology]
Strona internetowa  http://www.idt.com
Logo IDT - Integrated Device Technology

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84329AM-01
www.idt.com
REV. D
APRIL 9, 2014
13
843
29-01
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V
DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the 84329-01.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the 84329-01 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
CC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
• Power (core)
MAX = VCC_MAX * IEE_MAX = 3.465V * 110mA = 381.2mW
• Power (outputs)
MAX = 30mW/Loaded Output pair
Total Power
_MAX (3.465V, with all outputs switching) = 381.2mW + 30mW = 411.2mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of
the device. The maximum recommended junction temperature for the devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 39.7°C/W per Table 8A below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.411W * 39.7°C/W = 86.3°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 8A. THERMAL RESISTANCE
θ
JA
FOR
28-PIN SOIC, FORCED CONVECTION
TABLE 8B. THERMAL RESISTANCE
θ
JA
FOR
28-PIN PLCC, FORCED CONVECTION
θ
JA by Velocity (Linear Feet per Minute)
0200
500
Single-Layer PCB, JEDEC Standard Test Boards
76.2°C/W
60.8°C/W
53.2°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
46.2°C/W
39.7°C/W
36.8°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
θ
JA by Velocity (Linear Feet per Minute)
0200
500
Multi-Layer PCB, JEDEC Standard Test Boards
37.8°C/W
31.1°C/W
28.3°C/W



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