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L9634 Arkusz danych(PDF) 23 Page - STMicroelectronics |
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L9634 Arkusz danych(HTML) 23 Page - STMicroelectronics |
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23 / 36 page ![]() 23/36 L9634 4.26 STATUS.FLT Configuration Register STATUS.FLT register is defined as shown in the below table. The setting of these registers will influence the diagnostic fault indication flag in the status response. If any of these bits set to '1,' OSD inhibits the faults of the respective channels from affecting bit D13 (diagnostic fault flag) in the MISO Status Re- sponse. This STATUS.FLT configuration register does not afftect the operation of diagnostic fault regis- ters. Table 14. STATUS.FLT Configuration Register Bit D12 Bit D11 Bit D10 Bit D9 Bit D8 Description 0 0 1 1 1 Channel 6 and 7 Register, Table 21 RES ADC AD2 AD1 AD0 ADC Resistance Measurement Result 0 1 0 0 0 8-bit ADC Measurement Register: Ch 0 0 1 0 0 1 8-bit ADC Measurement Register: Ch 1 0 1 0 1 0 8-bit ADC Measurement Register: Ch 2 0 1 0 1 1 8-bit ADC Measurement Register: Ch 3 0 1 1 0 0 8-bit ADC Measurement Register: Ch 4 0 1 1 0 1 8-bit ADC Measurement Register: Ch 5 0 1 1 1 0 8-bit ADC Measurement Register: Ch 6 0 1 1 1 1 8-bit ADC Measurement Register: Ch 7 Bit Status Description D7 0 Enable Fault Report on Channel 7 (default) 1 Disable Fault Report on Channel 7 D6 0 Enable Fault Report on Channel 6 (default) 1 Disable Fault Report on Channel 6 D5 0 Enable Fault Report on Channel 5 (default) 1 Disable Fault Report on Channel 5 D4 0 Enable Fault Report on Channel 4 (default) 1 Disable Fault Report on Channel 4 D3 0 Enable Fault Report on Channel 3 (default) 1 Disable Fault Report on Channel 3 D2 0 Enable Fault Report on Channel 2 (default) 1 Disable Fault Report on Channel 2 D1 0 Enable Fault Report on Channel 1 (default) 1 Disable Fault Report on Channel 1 D0 0 Enable Fault Report on Channel 0 (default) 1 Disable Fault Report on Channel 0 Table 13. Address-bit Definition (continued) Obsolete Product(s) - Obsolete Product(s) |
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